Internal architecture of Intel 8086 microprocessor.

Internal Architecture of Intel 8086 Microprocessor: 

The Intel 8086, also called the iAPX 86, is a 16-bit microprocessor designed by Intel corporation between 1976-1978. This Intel 8086 microprocessor gave rise to the x86 architecture or 16-bit architecture. The figure given below is the internal architecture of Intel 8086 microprocessor


Features of 8086 Microprocessor:

  1. 8086 includes an Instruction Queue, which is used to store 6 instructions bytes at most at a time while an instruction is getting executed. This queuing improves the performance.
  2. The 8086 microprocessor performs faster operations as it has registers, internal and external buses and ALU, all of 16-bit.
  3. Microprocessor 8086 can execute an instruction and fetch the following instruction simultaneously.

Intel 8086 microprocessor has two units; Execution Unit (EU) and Bus Interface Unit (BIU). They are dependent and get worked by each other.

Units and Registers of 8086 Microprocessor:

Execution Unit (EU):

Execution unit receives program instruction codes and data from the BIU, executes them and stores the results in the general registers. It can also store the data in a memory location or send them to an I/O device by passing the data back to the BIU. This unit, EU, has no connection with the system Buses. It receives and outputs all its data through BIU.

Bus Interface Unit:

As the EU has no  connection with the system Buses, this job is done by Bus Interface Unit. BIU and EU are connected with an internal bus. BIU connects EU with the memory or I/O circuits. It is responsible for transmitting data, addresses and control signal on the buses. 

General Registers: 

General Registers or General Purpose Registers are a kind of registers which can store both data and addresses. All general registers of the Intel 8086 microprocessor can be used for arithmetic and logic operations. In the above given figure of Intel 8086 microprocessor, all data, pointer and index registers are general registers.

Segment Registers:

There are four segment registers, CS (Code Segment), DS (Data Segment), ES (Extra Segment) and SS (Stack Segment).

Instruction Pointer (IP):

To access instructions the Intel 8086 uses the registers CS and IP. The CS register contains the segment number of the next instruction and the IP contains the offset. IP is updated each time an instruction is executed so that it will point to the next instruction. Unlike other registers the IP can’t be directly manipulated by an instruction, that is, an instruction may not contain IP as its operand.

Flag Registers:

Intel 8086 has 16 flag registers among which 9 are active. The purpose of the flag register is to indicate the status of the processor. It does this by setting the individual bits called flags. There are two kind of flag registers; status flag register and control flag register. Status flag register reflect the result of an operation executed by the processor. The control flag registers enable or disable certain operations of the processor. The 9 active flag registers are Carry Flag (CF), Parity Flag (PF), Auxiliary Flag (AF), Zero Flag (ZF), Sign Flag (SF), Trap Flag (TF), Interrupt Flag (IF), Direction Flag (DF) and Overflow Flag (OF).

Arithmetic and Logic Unit (ALU):

Arithmetic and Logic Unit is a like a calculator. ALU performs all arithmetic operations along with decision making functions. In modern CPU or Microprocessors, there can be more than one integrated ALU to speed up arithmetical and logical operations, such as; integer unit, floating point unit etc.



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